embedded - What does TDO on 4th bit in ICSP SendCommand header mean? (PIC32MX, ICSP 2-wire 4-phase) -

right i'm trying implement flash programming specification pic32mx. i'm working pic32mx512l , pic32mx512h. pic32mx512l must transfer program 2 wires pgec2 , pged2 of pic32mx512h.

right i'm trying execute check device operation. specified, i'm entering programming mode mclr-juggling , executing setmode (6b011111) on tms clock while tdi clock stays low. tap controller replies zeroes (every tdo low).

after must execute sendcommand( mtap_sw_mtap ) select mtap controller. sequence shifted

(header) 01 01 00 00_ | (data) 00 00 10 00 00 | (most sign. bit) 01 | (footer) 01 00  

the first bit of each pairs tdi , second -- tms. write tdi on first clock, tms on second clock , read tdo during third , fourth clock. sequence feeded left right. shifted bits hold value during each clock fall.

the issue

after shifting first 4 pairs, tdo line goes on fourth pair high (on third clock) , low @ end of 4-phase part (on fourth clock). i've marked spot underscore in sequence above. after controller ignores further commands. on next sendcommand( mtap_command ), tdo stays low , later on xferdata( mchp_status ) tdo still stays low, no matter how send command.

i've done small screenshot oscilloscope. blue line clock, green 1 data. hop on right mean.

the question

does know tap controller trying tell me tdo high on fourth phase?

thank in advance!

well, i've fixed it. last tdo of prologue first least significant bit of output. sendcommand has no meaning, xferdata , xferfastdata important.

for xferfastdata praacc bit according spec. if bit zero, should repeat whole operation. but beware: mcu implementation doesn't follow spec. if restart whole operation fastdata if pracc zero, won't work. instead ignore bit , proceed writing. i've found out trial , error , comparing xferfastdata implementation against pic32prog.